arch_avr_misc.h Source File

yasimavr: arch_avr_misc.h Source File
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arch_avr_misc.h
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1/*
2 * arch_avr_misc.h
3 *
4 * Copyright 2021-2026 Clement Savergne <csavergne@yahoo.com>
5
6 This file is part of yasim-avr.
7
8 yasim-avr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
12
13 yasim-avr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with yasim-avr. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22//=======================================================================================
23
24#ifndef __YASIMAVR_AVR_MISC_H__
25#define __YASIMAVR_AVR_MISC_H__
26
27#include "arch_avr_globals.h"
28#include "core/sim_interrupt.h"
29#include "core/sim_memory.h"
31
33
34
35//=======================================================================================
44
45public:
46
47 explicit ArchAVR_VREF(double band_gap);
48
49};
50
51
52//=======================================================================================
53
63
68
69public:
70
72
73 virtual bool init(Device& device) override;
74 void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t& data);
75
76private:
77
78 const ArchAVR_IntCtrlConfig& m_config;
79 MemorySectionManager* m_sections;
82
83 virtual IRQ_t get_next_irq() const override;
84 void lock_timeout();
85 void section_raised(const signal_data_t& sigdata, int hooktag);
86
87};
88
89
90//=======================================================================================
95
97 std::vector<reg_addr_t> gpior;
98
99};
100
107
108public:
109
110 explicit ArchAVR_MiscRegCtrl(const ArchAVR_MiscConfig& config);
111
112 virtual bool init(Device& device) override;
113
114private:
115
116 const ArchAVR_MiscConfig& m_config;
117
118};
119
120
121//=======================================================================================
122
134
139
140public:
141
142 explicit ArchAVR_ResetCtrl(const ArchAVR_ResetCtrlConfig& config);
143
144 virtual bool init(Device& device) override;
145 virtual void reset(int flags) override;
146 virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t& data) override;
147
148private:
149
150 const ArchAVR_ResetCtrlConfig& m_config;
151 uint32_t m_rst_flags;
152
153 void check_flag_write(const regbit_t& rb, uint8_t write_value, int flag);
154
155};
156
157
159
160#endif //__YASIMAVR_AVR_MISC_H__
#define AVR_ARCHAVR_PUBLIC_API
Definition arch_avr_globals.h:46
Implementation of a interrupt controller for AVR series.
Definition arch_avr_misc.h:67
Implementation of a misc controller for AVR series.
Definition arch_avr_misc.h:106
Implementation of a Reset controller for AVR core series.
Definition arch_avr_misc.h:138
Implementation of a Voltage Reference controller for AVR series.
Definition arch_avr_misc.h:43
Definition sim_cycle_timer.h:85
Definition sim_signal.h:227
Basic AVR device model.
Definition sim_device.h:61
Generic interrupt controller.
Definition sim_interrupt.h:75
Memory section management.
Definition sim_memory.h:124
Abstract class defining a framework for MCU peripherals.
Definition sim_peripheral.h:286
virtual bool init(Device &device)
Definition sim_peripheral.cpp:60
virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t &data) override
Definition sim_peripheral.cpp:117
virtual void reset(int flags)
Definition sim_peripheral.cpp:72
Generic model for managing VREF for analog peripherals (ADC, analog comparator)
Definition sim_vref.h:72
bit spec structure. Represent a field in a I/O register. It works the same as bitmask_t except used b...
Definition sim_types.h:287
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
Represents a field in a I/O register with address.
Definition sim_types.h:348
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
Definition arch_avr_misc.h:54
unsigned int vector_size
Definition arch_avr_misc.h:57
bitspec_t bs_ivsel
Definition arch_avr_misc.h:59
bitspec_t bs_ivce
Definition arch_avr_misc.h:60
unsigned int vector_count
Definition arch_avr_misc.h:56
reg_addr_t reg_control
Definition arch_avr_misc.h:58
Configuration structure for ArchAVR_MiscRegCtrl.
Definition arch_avr_misc.h:94
std::vector< reg_addr_t > gpior
Array of addresses for the GPIORx registers.
Definition arch_avr_misc.h:97
Configuration structure for ArchAVR_ResetCtrl.
Definition arch_avr_misc.h:126
regbit_t rb_WDRF
Watchdog Reset flag bit.
Definition arch_avr_misc.h:131
regbit_t rb_EXTRF
External Reset flag bit.
Definition arch_avr_misc.h:129
regbit_t rb_PORF
Power On Reset flag bit.
Definition arch_avr_misc.h:128
regbit_t rb_BORF
Brown Out Reset flag bit.
Definition arch_avr_misc.h:130
Definition sim_interrupt.h:105
Definition sim_ioreg.h:39
Definition sim_signal.h:39