24#ifndef __YASIMAVR_AVR_TWI_H__
25#define __YASIMAVR_AVR_TWI_H__
74 virtual void reset(
int flags)
override;
99 void host_signal_raised(
const signal_data_t& sigdata,
int hooktag);
100 void client_signal_raised(
const signal_data_t& sigdata,
int hooktag);
101 void execute_command(
bool sta,
bool sto);
102 void raise_flag_and_status(uint8_t status);
103 void clear_flag_and_status();
104 bool address_match(uint8_t addr_rw);
#define AVR_ARCHAVR_PUBLIC_API
Definition arch_avr_globals.h:46
Definition arch_avr_twi.cpp:129
Definition arch_avr_twi.cpp:107
Definition arch_avr_twi.cpp:80
Implementation of a TWI model for the AVR series.
Definition arch_avr_twi.h:66
Definition sim_signal.h:227
Basic AVR device model.
Definition sim_device.h:61
Generic helper to manage a typical Interrupt Flag/Enable in a I/O register.
Definition sim_interrupt.h:324
Abstract class defining a framework for MCU peripherals.
Definition sim_peripheral.h:286
virtual bool init(Device &device)
Definition sim_peripheral.cpp:60
virtual bool ctlreq(ctlreq_id_t req, ctlreq_data_t *data)
Definition sim_peripheral.cpp:79
virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t &data) override
Definition sim_peripheral.cpp:117
virtual void reset(int flags)
Definition sim_peripheral.cpp:72
bit spec structure. Represent a field in a I/O register. It works the same as bitmask_t except used b...
Definition sim_types.h:287
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
Represents a field in a I/O register with address.
Definition sim_types.h:348
int ctlreq_id_t
Definition sim_peripheral.h:111
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
short int_vect_t
Definition sim_types.h:43
Configuration structure for ArchAVR_TWI.
Definition arch_avr_twi.h:39
bitspec_t bs_stop
Definition arch_avr_twi.h:46
regbit_t rb_status
Definition arch_avr_twi.h:52
regbit_t rb_addr_mask
Definition arch_avr_twi.h:57
bitspec_t bs_start
Definition arch_avr_twi.h:45
bitspec_t bs_ack_enable
Definition arch_avr_twi.h:49
bitspec_t bs_enable
Definition arch_avr_twi.h:44
bitspec_t bs_int_enable
Definition arch_avr_twi.h:47
regbit_t rb_gencall_enable
Definition arch_avr_twi.h:56
regbit_t rb_addr
Definition arch_avr_twi.h:55
reg_addr_t reg_data
Definition arch_avr_twi.h:54
regbit_t rb_prescaler
Definition arch_avr_twi.h:53
std::vector< unsigned long > ps_factors
Definition arch_avr_twi.h:41
bitspec_t bs_int_flag
Definition arch_avr_twi.h:48
reg_addr_t reg_ctrl
Definition arch_avr_twi.h:43
int_vect_t iv_twi
Definition arch_avr_twi.h:58
reg_addr_t reg_bitrate
Definition arch_avr_twi.h:51
Definition sim_peripheral.h:237
Definition sim_ioreg.h:39
Definition sim_signal.h:39