arch_xt_spi.h Source File

yasimavr: arch_xt_spi.h Source File
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arch_xt_spi.h
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1/*
2 * arch_xt_spi.h
3 *
4 * Copyright 2021-2026 Clement Savergne <csavergne@yahoo.com>
5
6 This file is part of yasim-avr.
7
8 yasim-avr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
12
13 yasim-avr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with yasim-avr. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22//=======================================================================================
23
24#ifndef __YASIMAVR_XT_SPI_H__
25#define __YASIMAVR_XT_SPI_H__
26
27#include "arch_xt_globals.h"
28#include "core/sim_interrupt.h"
29
31
32
33//=======================================================================================
34
47
48
56
57public:
58
59 ArchXT_SPI(int num, const ArchXT_SPIConfig& config);
60 virtual ~ArchXT_SPI();
61
62 virtual bool init(Device& device) override;
63 virtual void reset(int flags) override;
64 virtual bool ctlreq(ctlreq_id_t req, ctlreq_data_t* data) override;
65 virtual uint8_t ioreg_read_handler(reg_addr_t addr, uint8_t value) override;
66 virtual uint8_t ioreg_peek_handler(reg_addr_t addr, uint8_t value) override;
67 virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t& data) override;
68
69private:
70
71 class _PinDriver;
72 class _Controller;
74
75 friend class SPIController;
76
77 const ArchXT_SPIConfig& m_config;
78
79 _Controller* m_ctrl;
80 _InterruptHandler* m_intflag;
81
82 void frame_completed();
83 void host_selected();
84
85};
86
87
89
90#endif //__YASIMAVR_XT_SPI_H__
#define AVR_ARCHXT_PUBLIC_API
Definition arch_xt_globals.h:46
Definition arch_xt_spi.cpp:73
Definition arch_xt_spi.cpp:436
Definition arch_xt_spi.cpp:52
Implementation of a Serial Peripheral Interface controller for the XT core series.
Definition arch_xt_spi.h:55
Basic AVR device model.
Definition sim_device.h:61
Abstract class defining a framework for MCU peripherals.
Definition sim_peripheral.h:286
virtual bool init(Device &device)
Definition sim_peripheral.cpp:60
virtual bool ctlreq(ctlreq_id_t req, ctlreq_data_t *data)
Definition sim_peripheral.cpp:79
virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t &data) override
Definition sim_peripheral.cpp:117
virtual uint8_t ioreg_read_handler(reg_addr_t addr, uint8_t value) override
Definition sim_peripheral.cpp:91
virtual uint8_t ioreg_peek_handler(reg_addr_t addr, uint8_t value) override
Definition sim_peripheral.cpp:106
virtual void reset(int flags)
Definition sim_peripheral.cpp:72
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
int ctlreq_id_t
Definition sim_peripheral.h:111
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
short int_vect_t
Definition sim_types.h:43
Configuration structure for ArchXT_SPI.
Definition arch_xt_spi.h:39
int_vect_t iv_spi
Interrupt vector index.
Definition arch_xt_spi.h:44
reg_addr_t reg_base
Base address for the peripheral I/O registers.
Definition arch_xt_spi.h:42
Definition sim_peripheral.h:237
Definition sim_ioreg.h:39