24#ifndef __YASIMAVR_XT_TIMER_B_H__
25#define __YASIMAVR_XT_TIMER_B_H__
37#define AVR_CTLREQ_TCB_GET_EVENT_HOOK (AVR_CTLREQ_BASE + 1)
85 virtual void reset(
int flags)
override;
123 _PinDriver* m_pin_driver;
125 void set_counter_state(State state);
126 void counter_raised(
const signal_data_t& sigdata,
int hooktag);
127 void update_counter_top();
128 void update_on_CCMP_read();
129 void process_capture_event(
unsigned char event_state);
130 void event_hook_raised(
const signal_data_t& data,
int hooktag);
131 void process_count_event();
132 void raise_capture_flag();
133 void update_output(
int change);
#define AVR_ARCHXT_PUBLIC_API
Definition arch_xt_globals.h:46
Definition arch_xt_timer_b.cpp:58
Implementation of a Timer/Counter type B for the XT core series.
Definition arch_xt_timer_b.h:66
CaptureHookTag
Definition arch_xt_timer_b.h:75
@ Tag_Event
Definition arch_xt_timer_b.h:76
@ Tag_Count
Definition arch_xt_timer_b.h:77
SignalId
Definition arch_xt_timer_b.h:70
@ Signal_Output
Definition arch_xt_timer_b.h:72
@ Signal_Capture
Definition arch_xt_timer_b.h:71
Definition sim_signal.h:227
Definition sim_signal.h:137
Basic AVR device model.
Definition sim_device.h:61
Generic helper to manage a typical Interrupt Flag/Enable in a I/O register.
Definition sim_interrupt.h:324
Abstract class defining a framework for MCU peripherals.
Definition sim_peripheral.h:286
virtual bool init(Device &device)
Definition sim_peripheral.cpp:60
virtual bool ctlreq(ctlreq_id_t req, ctlreq_data_t *data)
Definition sim_peripheral.cpp:79
virtual void sleep(bool on, SleepMode mode)
Definition sim_peripheral.cpp:125
virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t &data) override
Definition sim_peripheral.cpp:117
virtual uint8_t ioreg_read_handler(reg_addr_t addr, uint8_t value) override
Definition sim_peripheral.cpp:91
virtual uint8_t ioreg_peek_handler(reg_addr_t addr, uint8_t value) override
Definition sim_peripheral.cpp:106
virtual void reset(int flags)
Definition sim_peripheral.cpp:72
Generic model of a Counter.
Definition sim_timer.h:164
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
int ctlreq_id_t
Definition sim_peripheral.h:111
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
#define AVR_INTERRUPT_NONE
Definition sim_interrupt.h:59
SleepMode
Definition sim_sleep.h:49
short int_vect_t
Definition sim_types.h:43
Configuration structure for ArchXT_TimerB.
Definition arch_xt_timer_b.h:43
int options
Definition arch_xt_timer_b.h:54
Options
Definition arch_xt_timer_b.h:45
@ OverflowFlag
Definition arch_xt_timer_b.h:47
@ EventCount
Definition arch_xt_timer_b.h:46
reg_addr_t reg_base
Base address for the peripheral I/O registers.
Definition arch_xt_timer_b.h:51
int_vect_t iv_capt
Interrupt vector index for TCB_CAPT.
Definition arch_xt_timer_b.h:53
Definition sim_peripheral.h:237
Definition sim_ioreg.h:39
Definition sim_signal.h:39