arch_xt_wdt.h Source File

yasimavr: arch_xt_wdt.h Source File
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arch_xt_wdt.h
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1/*
2 * arch_xt_wdt.h
3 *
4 * Copyright 2021-2026 Clement Savergne <csavergne@yahoo.com>
5
6 This file is part of yasim-avr.
7
8 yasim-avr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
12
13 yasim-avr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with yasim-avr. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22//=======================================================================================
23
24#ifndef __YASIMAVR_XT_WDT_H__
25#define __YASIMAVR_XT_WDT_H__
26
27#include "arch_xt_globals.h"
28#include "core/sim_peripheral.h"
29
31
32
33//=======================================================================================
34
39
41 unsigned long clock_frequency;
44
45};
46
47
52
53public:
54
55 explicit ArchXT_WDT(const ArchXT_WDTConfig& config);
56
57 virtual bool init(Device& device) override;
58 virtual void reset(int flags) override;
59 virtual bool ctlreq(ctlreq_id_t req, ctlreq_data_t* data) override;
60 virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t& data) override;
61
62private:
63
64 const ArchXT_WDTConfig& m_config;
67 bool m_first_wdr;
68
69 std::tuple<cycle_count_t, cycle_count_t> calculate_delays(uint8_t reg_value);
70 void timeout();
71 void wdr_sync_timer_next();
72
73};
74
75
77
78#endif //__YASIMAVR_XT_WDT_H__
#define AVR_ARCHXT_PUBLIC_API
Definition arch_xt_globals.h:46
Implementation of a Watchdog Timer for XT core series.
Definition arch_xt_wdt.h:51
Definition sim_cycle_timer.h:85
Basic AVR device model.
Definition sim_device.h:61
Abstract class defining a framework for MCU peripherals.
Definition sim_peripheral.h:286
virtual bool init(Device &device)
Definition sim_peripheral.cpp:60
virtual bool ctlreq(ctlreq_id_t req, ctlreq_data_t *data)
Definition sim_peripheral.cpp:79
virtual void ioreg_write_handler(reg_addr_t addr, const ioreg_write_t &data) override
Definition sim_peripheral.cpp:117
virtual void reset(int flags)
Definition sim_peripheral.cpp:72
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
int ctlreq_id_t
Definition sim_peripheral.h:111
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
Configuration structure for ArchXT_WDT.
Definition arch_xt_wdt.h:38
reg_addr_t reg_base
Base address for the peripheral I/O registers.
Definition arch_xt_wdt.h:43
unsigned long clock_frequency
Frequency in Hertz of the clock used for the Watchdog Timer.
Definition arch_xt_wdt.h:41
Definition sim_peripheral.h:237
Definition sim_ioreg.h:39