24#ifndef __YASIMAVR_CONFIG_H__
25#define __YASIMAVR_CONFIG_H__
70 std::vector<std::string>
pins;
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
std::vector< uint8_t > bytes_t
Definition sim_types.h:51
unsigned long flash_addr_t
Definition sim_types.h:42
unsigned long mem_addr_t
Definition sim_types.h:41
Definition sim_config.h:37
mem_addr_t ioend
Definition sim_config.h:48
reg_addr_t eind
Definition sim_config.h:55
mem_addr_t ramend
Definition sim_config.h:50
bytes_t fuses
Definition sim_config.h:57
mem_addr_t ramstart
Definition sim_config.h:49
flash_addr_t flashsize
Definition sim_config.h:52
reg_addr_t rampz
Definition sim_config.h:54
uint32_t attributes
Definition sim_config.h:46
mem_addr_t datasize
Definition sim_config.h:51
Attributes
Definition sim_config.h:39
@ ExtendedAddressing
Definition sim_config.h:41
@ ClearGIEOnInt
Definition sim_config.h:43
mem_addr_t iostart
Definition sim_config.h:47
Definition sim_config.h:66
std::vector< std::string > pins
Definition sim_config.h:70
DeviceConfiguration(CoreConfiguration &_core)
Definition sim_config.h:72
CoreConfiguration & core
Definition sim_config.h:69
std::string name
Definition sim_config.h:68