24#ifndef __YASIMAVR_DEBUG_H__
25#define __YASIMAVR_DEBUG_H__
48 Watchpoint_Write = 0x01,
49 Watchpoint_Read = 0x02,
51 Watchpoint_Signal = 0x10,
52 Watchpoint_Break = 0x20,
64 void attach(
Device& device);
70 bool attached()
const;
72 void reset_device()
const;
76 void write_gpreg(
unsigned int num, uint8_t value)
const;
77 uint8_t read_gpreg(
unsigned int num)
const;
80 void write_sreg(uint8_t value)
const;
81 uint8_t read_sreg()
const;
93 void write_ioreg(
reg_addr_t addr, uint8_t value)
const;
94 uint8_t read_ioreg(
reg_addr_t addr,
bool as_cpu =
true)
const;
111 void remove_watchpoint(
mem_addr_t addr,
int flags);
112 Signal& watchpoint_signal();
115 void _cpu_notify_data_read(
mem_addr_t addr, uint8_t value);
116 void _cpu_notify_data_write(
mem_addr_t addr, uint8_t value);
119 void _cpu_notify_ret();
125 struct watchpoint_t {
136 std::vector<DeviceDebugProbe*> m_secondaries;
138 std::map<flash_addr_t, breakpoint_t> m_breakpoints;
140 std::map<mem_addr_t, watchpoint_t> m_watchpoints;
144 void notify_watchpoint(watchpoint_t& wp,
int event,
mem_addr_t addr, uint8_t value);
Definition sim_debug.h:42
bool attached() const
Definition sim_debug.h:153
Device * device() const
Definition sim_debug.h:148
Signal & watchpoint_signal()
Definition sim_debug.h:158
WatchpointFlags
Definition sim_debug.h:46
Basic AVR device model.
Definition sim_device.h:61
State
Definition sim_device.h:70
Signalling framework class.
Definition sim_signal.h:97
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define AVR_CORE_PUBLIC_API
Definition sim_globals.h:46
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
unsigned long flash_addr_t
Definition sim_types.h:42
unsigned long mem_addr_t
Definition sim_types.h:41