sim_debug.h Source File

yasimavr: sim_debug.h Source File
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sim_debug.h
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1/*
2 * sim_debug.h
3 *
4 * Copyright 2021-2025 Clement Savergne <csavergne@yahoo.com>
5
6 This file is part of yasim-avr.
7
8 yasim-avr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
12
13 yasim-avr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with yasim-avr. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22//=======================================================================================
23
24#ifndef __YASIMAVR_DEBUG_H__
25#define __YASIMAVR_DEBUG_H__
26
27#include "sim_types.h"
28#include "sim_device.h"
29
31
32//=======================================================================================
33/*
34 * DeviceDebugProbe is a facility to access the inner state of a Device and its core
35 * to debug the execution of a firmware.
36 * It provides:
37 * - function to read/write directly into CPU registers, I/O registers, flash, data space
38 * - soft breakpoints
39 * - data watchpoints
40 * - device reset and state change
41 */
43
44public:
45
47 //Event flags
48 Watchpoint_Write = 0x01,
49 Watchpoint_Read = 0x02,
50 //Action flags
51 Watchpoint_Signal = 0x10,
52 Watchpoint_Break = 0x20,
53 };
54
56 explicit DeviceDebugProbe(Device& device);
58 //Destructor: ensures the probe is detached
60
61 Device* device() const;
62
63 //Attaches the probe to a device, allowing access to its internals
64 void attach(Device& device);
65 //Attaches this to the same device as the argument
66 void attach(DeviceDebugProbe& probe);
67 //Detaches the probe from the device. it MUST be called before
68 //destruction.
69 void detach();
70 bool attached() const;
71
72 void reset_device() const;
73 void set_device_state(Device::State state) const;
74
75 //Access to general purpose CPU registers
76 void write_gpreg(unsigned int num, uint8_t value) const;
77 uint8_t read_gpreg(unsigned int num) const;
78
79 //Access to the SREG register
80 void write_sreg(uint8_t value) const;
81 uint8_t read_sreg() const;
82
83 //Access to the Stack Pointer
84 void write_sp(mem_addr_t value) const;
85 mem_addr_t read_sp() const;
86
87 //Access to the Program Counter
88 void write_pc(flash_addr_t value) const;
89 flash_addr_t read_pc() const;
90
91 //Access to I/O registers. From the peripherals point of view, it's
92 //the same as a CPU access
93 void write_ioreg(reg_addr_t addr, uint8_t value) const;
94 uint8_t read_ioreg(reg_addr_t addr, bool as_cpu = true) const;
95 bool has_ioreg(reg_addr_t addr) const;
96
97 //Access to the flash memory
98 void write_flash(flash_addr_t addr, const uint8_t* buf, flash_addr_t len) const;
99 flash_addr_t read_flash(flash_addr_t addr, uint8_t* buf, flash_addr_t len) const;
100
101 //Access to the data space
102 void write_data(mem_addr_t addr, const uint8_t* buf, mem_addr_t len) const;
103 void read_data(mem_addr_t addr, uint8_t* buf, mem_addr_t len) const;
104
105 //Breakpoint management
106 void insert_breakpoint(flash_addr_t addr);
107 void remove_breakpoint(flash_addr_t addr);
108
109 //Watchpoint management
110 void insert_watchpoint(mem_addr_t addr, mem_addr_t len, int flags);
111 void remove_watchpoint(mem_addr_t addr, int flags);
112 Signal& watchpoint_signal();
113
114 //Callbacks from the CPU for notifications
115 void _cpu_notify_data_read(mem_addr_t addr, uint8_t value);
116 void _cpu_notify_data_write(mem_addr_t addr, uint8_t value);
117 void _cpu_notify_jump(flash_addr_t addr);
118 void _cpu_notify_call(flash_addr_t addr);
119 void _cpu_notify_ret();
120
121 DeviceDebugProbe& operator=(const DeviceDebugProbe& probe);
122
123private:
124
125 struct watchpoint_t {
126 mem_addr_t addr;
127 mem_addr_t len;
128 int flags;
129 };
130
131 //Pointer to the device this is attached to.
132 Device* m_device;
133 //Pointer to the primary probe. If null, this is primary.
134 DeviceDebugProbe* m_primary;
135 //Vector of secondary probes.
136 std::vector<DeviceDebugProbe*> m_secondaries;
137 //Mapping containers PC => breakpoint
138 std::map<flash_addr_t, breakpoint_t> m_breakpoints;
139 //Mapping containers mem address => watchpoint
140 std::map<mem_addr_t, watchpoint_t> m_watchpoints;
141 //Signal for watchpoint notification
142 Signal m_wp_signal;
143
144 void notify_watchpoint(watchpoint_t& wp, int event, mem_addr_t addr, uint8_t value);
145
146};
147
149{
150 return m_device;
151}
152
153inline bool DeviceDebugProbe::attached() const
154{
155 return !!m_device;
156}
157
159{
160 return m_wp_signal;
161}
162
163
165
166#endif //__YASIMAVR_DEBUG_H__
Definition sim_debug.h:42
bool attached() const
Definition sim_debug.h:153
Device * device() const
Definition sim_debug.h:148
Signal & watchpoint_signal()
Definition sim_debug.h:158
WatchpointFlags
Definition sim_debug.h:46
Basic AVR device model.
Definition sim_device.h:61
State
Definition sim_device.h:70
Signalling framework class.
Definition sim_signal.h:97
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define AVR_CORE_PUBLIC_API
Definition sim_globals.h:46
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
unsigned long flash_addr_t
Definition sim_types.h:42
unsigned long mem_addr_t
Definition sim_types.h:41