24#ifndef __YASIMAVR_VREF_H__
25#define __YASIMAVR_VREF_H__
27#include "../core/sim_peripheral.h"
28#include "../core/sim_types.h"
51#define AVR_CTLREQ_VREF_GET (AVR_CTLREQ_BASE + 1)
59#define AVR_CTLREQ_VREF_SET (AVR_CTLREQ_BASE + 2)
101 explicit VREF(
unsigned int ref_count);
109 void set_reference(
unsigned int index, Source source,
double voltage=1.0);
110 double reference(
unsigned int index)
const;
123 std::vector<ref_t> m_references;
Definition sim_signal.h:137
Abstract class defining a framework for MCU peripherals.
Definition sim_peripheral.h:286
virtual bool ctlreq(ctlreq_id_t req, ctlreq_data_t *data)
Definition sim_peripheral.cpp:79
Generic model for managing VREF for analog peripherals (ADC, analog comparator)
Definition sim_vref.h:72
SignalId
Definition sim_vref.h:84
@ Signal_VCCChange
Definition sim_vref.h:98
@ Signal_IntRefChange
Definition sim_vref.h:93
@ Signal_ARefChange
Definition sim_vref.h:88
Source
Enumation value for the sources of voltage references.
Definition sim_vref.h:77
@ Source_Internal
Internal reference voltage value.
Definition sim_vref.h:81
@ Source_AREF
AREF voltage value.
Definition sim_vref.h:80
@ Source_VCC
VCC voltage value.
Definition sim_vref.h:78
@ Source_AVCC
AVCC voltage value (always equal to VCC for now)
Definition sim_vref.h:79
bool active() const
Definition sim_vref.h:127
int ctlreq_id_t
Definition sim_peripheral.h:111
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define AVR_CORE_PUBLIC_API
Definition sim_globals.h:46
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
Definition sim_peripheral.h:237