Class Core

Inheritance Relationships

Derived Types

Class Documentation

class Core

AVR core generic model.

Base model for a AVR MCU 8-bits core. This is an abstract class that the different architecture sub-classes must reimplement.

Subclassed by ArchAVR_Core, ArchXT_Core

Public Types

enum NVM

NVM type enum, used for loading a firmware. The generic core handles only the flash and fuses. The rest (including eeprom) must be handled by the architecture implementations.

Values:

enumerator NVM_Flash
enumerator NVM_Fuses
enumerator NVM_CommonCount
enumerator NVM_ArchDefined
enumerator NVM_GetCount

Public Functions

explicit Core(const CoreConfiguration &config)

Build a MCU core.

Parameters:

config – Configuration settings for the core

virtual ~Core()

Destroy a MCU core.

inline const CoreConfiguration &config() const
bool init(Device &device)

Initialise a MCU core.

Returns:

the status of initialisation, it’s always true.

void reset()

Reset the core:

  • the Program Counter is set to 0x0000,

  • all general purpose registers are set to 0x00,

  • all I/O registers are set by default to 0x00 (Peripheral models are responsible for resetting registers whose reset values are different),

  • the Stack Pointer is set to RAMEND.

int exec_cycle()

Execute a single instruction cycle with the CPU.

Returns:

the number of clock cycle consumed by the instruction, or 0 if something wrong happened.

IO_Register *get_ioreg(reg_addr_t addr)

Helper function to get access to IO Registers. If a register does not exist, it is allocated.

Parameters:

addr – Address of the register to access (in IO address space)

Returns:

IO_Register object

uint8_t ioctl_read_ioreg(reg_addr_t addr)

Read the content of a I/O register.

If the register does not exist, the device crashes with the code CRASH_BAD_CTL_IO.

This function is intended for peripheral model use only.

Parameters:

addr – address of the register to access (in IO address space)

Returns:

content of the register

void ioctl_write_ioreg(const regbit_t &rb, uint8_t value)

Write the content of a I/O register.

If the register does not exist, the device crashes with the code CRASH_BAD_CTL_IO.

This function is intended for peripheral model use only.

Parameters:

  • rb – regbit of the register/field to access (in IO address space)

  • value – value to write

void start_interrupt_inhibit(unsigned int count)

Start an interrupt inhibit counter. The counter is decremented for each instruction executed after this call. Raised interrupts will be held up until this counter has dropped to zero.

Parameters:

count – initial inhibit counter value

inline void set_console_register(reg_addr_t addr)
inline void set_direct_LPM_enabled(bool enabled)
Core(const Core&) = delete
Core &operator=(const Core&) = delete

Protected Functions

uint8_t cpu_read_ioreg(reg_addr_t addr)

Read the content of a I/O register.

If the register does not exist, by default, the device crashes with the code CRASH_BAD_CPU_IO. If the option IgnoreBadCpuIO is set, the error is ignored and the value 0x00 is returned.

This function is intended for CPU model use only.

Parameters:

addr – address of the register to access (in IO address space)

Returns:

content of the register

void cpu_write_ioreg(reg_addr_t addr, uint8_t value)

Write the content of a I/O register.

An error will occurred if the register does not exist, or if the call is modifying the read-only part of an existing register. If an error occurred, by default, the device crashes with the code CRASH_BAD_CPU_IO. If the option IgnoreBadCpuIO is set, the error is ignored and the register is unchanged.

This function is intended for CPU model use only.

Parameters:

  • addr – address of the register to access (in IO address space)

  • value – value to write

uint8_t cpu_read_gpreg(uint8_t reg)

Read the content of a general purpose register. This function is intended for CPU model use only.

Parameters:

reg – index of the register to read (0-31)

Returns:

content of the register

void cpu_write_gpreg(uint8_t reg, uint8_t value)

Write the content of a general purpose register. This function is intended for CPU model use only.

Parameters:

  • reg – index of the register to read (0-31)

  • value – 8-bits value to write in the register

virtual uint8_t cpu_read_data(mem_addr_t data_addr) = 0

Read memory in data address space. This is a pure virtual function that architectures should implement. Implementations should ensure that, if the address is invalid, the behavior should be consistent with the option IgnoreBadCpuIO.

This function is intended for CPU use only.

See also

cpu_read_ioreg()

Parameters:

data_addr – Memory address (in 8-bits, data address space) to read

Returns:

Content at the flash address

virtual void cpu_write_data(mem_addr_t data_addr, uint8_t value) = 0

Write memory in data address space. This is a pure virtual function that architectures should implement. Implementations should ensure that, if the address is invalid or read-only, the behavior should be consistent with the option IgnoreBadCpuIO.

This function is intended for CPU use only.

See also

cpu_write_ioreg()

Parameters:

  • data_addr – Memory address (in 8-bits, data address space) to read

  • value – Value to write

int16_t cpu_read_flash(flash_addr_t pgm_addr)

Read the content of the flash non-volatile memory.

This function is intended for CPU use only, to implement the LPM/ELPM instruction.

If the address is out of bounds, the device will crash. If the address is unprogrammed, by default the device will crash but the error can be ignored by setting the option IgnoreBadCpuLPM.

Parameters:

pgm_addr – Flash address (in 8-bits, flash address space) to read

Returns:

value content at the flash address

inline bool use_extended_addressing() const
virtual void dbg_read_data(mem_addr_t start, uint8_t *buf, mem_addr_t len) = 0

Read memory in data address space. This is a pure virtual function that architectures should implement.

This function is intended for debug probe use only.

Parameters:

  • start – First memory address (in 8-bits, data address space) to read

  • buf – Buffer where the memory data will be copied into

  • len – Length of the memory block to read

virtual void dbg_write_data(mem_addr_t start, const uint8_t *buf, mem_addr_t len) = 0

Write memory in data address space. This is a pure virtual function that architectures should implement.

This function is intended for debug probe use only.

Parameters:

  • start – First memory address (in 8-bits, data address space) to read

  • buf – Buffer from which the memory data will be copied

  • len – Length of the memory block to write

void dbg_insert_breakpoint(breakpoint_t &bp)

Insert a soft breakpoint at the flash address set in bp This is done by replacing the normal instruction by a BREAK. The normal instruction is backed up in the breakpoint structure.

Parameters:

bp – breakpoint to insert

void dbg_remove_breakpoint(breakpoint_t &bp)

Remove a soft breakpoint at the flash address set in bp This is done by restoring the initial instruction backed up in the breakpoint object.

Parameters:

bp – breakpoint to remove

Protected Attributes

const CoreConfiguration &m_config

Reference to the configuration structure, set at construction.

Device *m_device

Pointer to the device, set by init()

uint8_t m_regs[32]

Array of the 32 general registers.

std::vector<IO_Register*> m_ioregs

Array of the I/O registers.

uint8_t *m_sram

Pointer to the array representing the device RAM memory.

NonVolatileMemory m_flash

Non-volatile memory model for the flash.

NonVolatileMemory m_fuses

Non-volatile memory model for the fuse bits.

flash_addr_t m_pc

Program Counter register, expressed in bytes (unlike the actual device PC)

unsigned int m_int_inhib_counter

Counter to inhibit interrupts for a given number of instructions.

DeviceDebugProbe *m_debug_probe

Pointer to the generic debug probe.

MemorySectionManager *m_section_manager