.. _exhale_define_sim__cpu_8cpp_1a52ddd399b0a34e3780a4b2e5421aaecf:

Define get_d5_vr5
=================

- Defined in :ref:`file__home_docs_checkouts_readthedocs.org_user_builds_yasimavr_checkouts_v0.1.4_lib_core_src_core_sim_cpu.cpp`


Define Documentation
--------------------


.. doxygendefine:: get_d5_vr5
   :project: yasimavr