ArchAVR_Timer Class Reference

yasimavr: ArchAVR_Timer Class Reference

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Timer/Counter model for AVR series. More...

#include <arch_avr_timer.h>

Inheritance diagram for ArchAVR_Timer:

Classes
struct	OutputCompareChannel

Public Types
enum	SignalId { Signal_OVF , Signal_CompMatch , Signal_CompOutput , Signal_Capt }

Public Member Functions
	ArchAVR_Timer (int num, const ArchAVR_TimerConfig &config)

	~ArchAVR_Timer ()

virtual bool	init (Device &device) override

virtual void	reset (int flags) override

virtual bool	ctlreq (ctlreq_id_t req, ctlreq_data_t *data) override

virtual uint8_t	ioreg_read_handler (reg_addr_t addr, uint8_t value) override

virtual uint8_t	ioreg_peek_handler (reg_addr_t addr, uint8_t value) override

virtual void	ioreg_write_handler (reg_addr_t addr, const ioreg_write_t &data) override

Public Member Functions inherited from Peripheral
	Peripheral (ctl_id_t id)

virtual	~Peripheral ()

ctl_id_t	id () const
	Unique identifier of the peripheral.

std::string	name () const
	The name of the peripheral.

virtual void	sleep (bool on, SleepMode mode)

	Peripheral (const Peripheral &)=delete

Peripheral &	operator= (const Peripheral &)=delete

Public Member Functions inherited from IORegHandler
virtual	~IORegHandler ()=default

Friends
struct	OutputCompareChannel

Additional Inherited Members
Protected Member Functions inherited from Peripheral
Device *	device () const
	Access to the device. It is null before init() is called.

Logger &	logger ()
	Logging object associated with this peripheral.

bool	register_interrupt (int_vect_t vector, InterruptHandler &handler) const

Signal *	get_signal (ctl_id_t ctl_id) const

void	add_ioreg (const regmask_t &rm, IORegister::BitMode bitmode=IORegister::RW)

void	add_ioreg (const regbit_compound_t &rbc, IORegister::BitMode bitmode=IORegister::RW)

void	add_ioreg (reg_addr_t addr, IORegister::BitMode bitmode=IORegister::RW)

void	add_ioreg (reg_addr_t addr, bitmask_t mask, IORegister::BitMode bitmode=IORegister::RW)

uint8_t	read_ioreg (const regbit_t &rb) const

uint64_t	read_ioreg (const regbit_compound_t &rbc) const

uint8_t	read_ioreg (reg_addr_t addr) const

uint8_t	read_ioreg (reg_addr_t addr, const bitspec_t &bs) const

bool	test_ioreg (const regbit_t &rb) const

bool	test_ioreg (const regbit_compound_t &rbc) const

bool	test_ioreg (reg_addr_t addr, const bitspec_t &bs) const

bool	test_ioreg (reg_addr_t addr, bitmask_t bm=0xFF) const

void	write_ioreg (reg_addr_t addr, bitmask_t bm, uint8_t value)

void	write_ioreg (const regbit_t &rb, uint8_t value)

void	write_ioreg (const regbit_compound_t &rbc, uint64_t value)

void	write_ioreg (reg_addr_t addr, uint8_t value)

void	write_ioreg (reg_addr_t addr, const bitspec_t &bs, uint8_t value)

void	set_ioreg (reg_addr_t addr, bitmask_t bm=0xFF)

void	set_ioreg (const regbit_t &rb)

void	set_ioreg (const regbit_compound_t &rbc)

void	set_ioreg (reg_addr_t addr, const bitspec_t &bs)

void	clear_ioreg (reg_addr_t addr, bitmask_t bm=0xFF)

void	clear_ioreg (const regbit_t &rb)

void	clear_ioreg (const regbit_compound_t &rbc)

void	clear_ioreg (reg_addr_t addr, const bitspec_t &bs)

Detailed Description

Timer/Counter model for AVR series.

Implementation of a 8bits/16bits Timer/Counter for AVR series

This timer is a flexible implementation aiming at covering most modes found in AVR timer/counter. It covers normal, CTC, PWM in both single and dual slopes. The behaviour is defined by a mode_config_t structure selected by the mode field. It has a number of Output Compare channels, each defined by a OC_config_t structure. Each OC channel behaviour is defined by a set of Compare Output Mode (COM) values.

Unsupported features:

Asynchronous operations

Member Enumeration Documentation

◆ SignalId

enum ArchAVR_Timer::SignalId

Enumerator
Signal_OVF	Raised on a overflow event, no data is carried.
Signal_CompMatch	Raised on a Compare Match event. The index indicates which channel (0='A', 1='B', ...), no data is carried.
Signal_CompOutput	Raised with the Compare Output state. The index indicates which channel (0='A', 1='B', ...) The data is the state (0 or 1) or invalid data if the channel is disabled.
Signal_Capt	Raised on a Input Capture event, no data is carried.

Constructor & Destructor Documentation

◆ ArchAVR_Timer()

ArchAVR_Timer::ArchAVR_Timer	(	int	num,
		const ArchAVR_TimerConfig &	config
	)

◆ ~ArchAVR_Timer()

ArchAVR_Timer::~ArchAVR_Timer ( )

Member Function Documentation

◆ ctlreq()

bool ArchAVR_Timer::ctlreq	(	ctlreq_id_t	req,
		ctlreq_data_t *	data
	)

overridevirtual

Virtual method called for a CTL request. The method must return true if the request has been processed.

Reimplemented from Peripheral.

◆ init()

bool ArchAVR_Timer::init ( Device & device )

overridevirtual

Virtual method called when the device is initialised. This is where the peripheral can allocate its I/O registers, interrupts or connect signals.

Returns: boolean indicates the success of all allocations.

Reimplemented from Peripheral.

◆ ioreg_peek_handler()

uint8_t ArchAVR_Timer::ioreg_peek_handler	(	reg_addr_t	addr,
		uint8_t	value
	)

overridevirtual

Virtual method called when a debug probe is peeking the value of a register. The value has not been read yet so the module can modify it before the CPU gets it. The difference between a peek and a read is that a peek should not modify the state of the peripheral. By default, ioreg_read_handler is called to obtain the value.

Parameters

addr	the register address in I/O space
value	current cached value of the register

Returns: actual value of the register

Reimplemented from Peripheral.

◆ ioreg_read_handler()

uint8_t ArchAVR_Timer::ioreg_read_handler	(	reg_addr_t	addr,
		uint8_t	value
	)

overridevirtual

Virtual method called when the CPU is reading a I/O register allocated by this peripheral. The value has not been read yet so the module can modify it before the CPU gets it.

Parameters

addr	the register address in I/O space
value	current cached value of the register

Returns: actual value of the register

Reimplemented from Peripheral.

◆ ioreg_write_handler()

void ArchAVR_Timer::ioreg_write_handler	(	reg_addr_t	addr,
		const ioreg_write_t &	value
	)

overridevirtual

Virtual method called when the CPU is writing a I/O register allocated by this peripheral. The value has already been written.

Parameters

addr	the register address in I/O space
value	the new register content

Reimplemented from Peripheral.

◆ reset()

void ArchAVR_Timer::reset ( int flags )

overridevirtual

Virtual method called when the device is reset. Note that resetting I/O registers is only necessary here if their reset value is not zero.

Parameters

flags Reset flags (OR'ed combination of Device::ResetFlag enumeration values)

Reimplemented from Peripheral.

Friends And Related Symbol Documentation

◆ OutputCompareChannel

friend struct OutputCompareChannel

friend

The documentation for this class was generated from the following files:

ArchAVR_Timer Class Reference

Classes

Public Types

Public Member Functions

Friends

Additional Inherited Members

Detailed Description

Member Enumeration Documentation

◆ SignalId

Constructor & Destructor Documentation

◆ ArchAVR_Timer()

◆ ~ArchAVR_Timer()

Member Function Documentation

◆ ctlreq()

◆ init()

◆ ioreg_peek_handler()

◆ ioreg_read_handler()

◆ ioreg_write_handler()

◆ reset()

Friends And Related Symbol Documentation

◆ OutputCompareChannel