sim_device.h Source File

yasimavr: sim_device.h Source File
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sim_device.h
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1/*
2 * sim_device.h
3 *
4 * Copyright 2021-2026 Clement Savergne <csavergne@yahoo.com>
5
6 This file is part of yasim-avr.
7
8 yasim-avr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
12
13 yasim-avr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with yasim-avr. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22//=======================================================================================
23
24#ifndef __YASIMAVR_DEVICE_H__
25#define __YASIMAVR_DEVICE_H__
26
27#include "sim_core.h"
28#include "sim_cycle_timer.h"
29#include "sim_peripheral.h"
30#include "sim_logger.h"
31#include <string>
32#include <vector>
33
35
37class Firmware;
38class Interrupt;
39enum class SleepMode;
40
41
42//=======================================================================================
43//Crash codes definition
44
45#define CRASH_PC_OVERFLOW 0x01
46#define CRASH_SP_OVERFLOW 0x02
47#define CRASH_BAD_CPU_IO 0x03
48#define CRASH_BAD_CTL_IO 0x04
49#define CRASH_INVALID_OPCODE 0x05
50#define CRASH_INVALID_CONFIG 0x06
51#define CRASH_FLASH_ADDR_OVERFLOW 0x07
52#define CRASH_ACCESS_REFUSED 0x08
53
54
55//=======================================================================================
62
63 friend class DeviceDebugProbe;
64
65public:
66
70 enum State {
71 State_Limbo = 0x00,
72 State_Ready = 0x10,
73 State_Running = 0x21,
74 State_Sleeping = 0x31,
75 State_Halted = 0x41,
76 State_Reset = 0x51,
77 State_Break = 0x60,
78 State_Done = 0x70,
79 State_Crashed = 0x80,
80 State_Destroying = 0xFF,
81 };
82
86 enum ResetFlag {
87 Reset_PowerOn = 0x00000001,
88 Reset_WDT = 0x00000002,
89 Reset_BOD = 0x00000004,
90 Reset_SW = 0x00000008,
91 Reset_Ext = 0x00000010,
92 Reset_Halt = 0x00010000,
93 };
94
101 enum Option {
104 Option_ResetOnPinShorting = 0x01,
105
116 Option_IgnoreBadCpuIO = 0x02,
117
122 Option_IgnoreBadCpuLPM = 0x04,
123
125 Option_DisablePseudoSleep = 0x08,
126
132 Option_InfiniteLoopDetect = 0x10,
133 };
134
135 Device(Core& core, const DeviceConfiguration& config);
136 virtual ~Device() = default;
137
138 Core& core() const;
139
140 void set_option(Option option, bool value);
141 bool test_option(Option option) const;
142
143 const DeviceConfiguration& config() const;
144 State state() const;
145 cycle_count_t cycle() const;
146 SleepMode sleep_mode() const; //Returns one of SleepMode enum values
147 unsigned long frequency() const;
148
149 bool init(CycleManager& cycle_manager);
150
151 bool load_firmware(const Firmware& firmware);
152
153 void reset(int reset_flags = Reset_PowerOn);
154
155 cycle_count_t exec_cycle();
156
157 void attach_peripheral(Peripheral& ctl);
158
159 void add_ioreg_handler(reg_addr_t addr, IORegHandler& handler, bitmask_t bits, IORegister::BitMode bitmode);
160 Peripheral* find_peripheral(ctl_id_t id);
161 bool ctlreq(ctl_id_t id, ctlreq_id_t req, ctlreq_data_t* reqdata = nullptr);
162
163 //Helpers for the peripheral timers
164 CycleManager* cycle_manager();
165
166 Pin* find_pin(pin_id_t id);
167 PinManager& pin_manager();
168
169 LogHandler& log_handler();
170 Logger& logger();
171
172 void crash(uint16_t reason, const char* text);
173
174 Device(const Device&) = delete;
175 Device& operator=(const Device&) = delete;
176
177protected:
178
179 virtual bool arch_init();
180
181 virtual bool core_ctlreq(ctlreq_id_t req, ctlreq_data_t* reqdata);
182
183 virtual bool program(const Firmware& firmware);
184
185 void erase_peripherals();
186
187 virtual flash_addr_t reset_vector();
188
189private:
190
191 Core& m_core;
192 const DeviceConfiguration& m_config;
193 int m_options;
194 State m_state;
195 unsigned long m_frequency;
196 SleepMode m_sleep_mode;
197 DeviceDebugProbe* m_debugger;
198 LogHandler m_log_handler;
199 Logger m_logger;
200 std::vector<Peripheral*> m_peripherals;
201 PinManager m_pin_manager;
202 CycleManager* m_cycle_manager;
203 int m_reset_flags;
204
205 void set_state(State state);
206
207};
208
210{
211 return m_config;
212}
213
215{
216 return m_state;
217}
218
220{
221 return m_cycle_manager ? m_cycle_manager->cycle() : INVALID_CYCLE;
222}
223
224inline Core& Device::core() const
225{
226 return m_core;
227}
228
230{
231 return m_sleep_mode;
232}
233
234inline unsigned long Device::frequency() const
235{
236 return m_frequency;
237}
238
239inline void Device::set_state(State state)
240{
241 m_state = state;
242}
243
245{
246 return m_log_handler;
247}
248
250{
251 return m_logger;
252}
253
255{
256 return m_cycle_manager;
257}
258
260{
261 return m_pin_manager;
262}
263
264
266
267#endif //__YASIMAVR_DEVICE_H__
AVR core generic model.
Definition sim_core.h:96
Definition sim_cycle_timer.h:134
cycle_count_t cycle() const
Returns the current cycle.
Definition sim_cycle_timer.h:184
Definition sim_debug.h:42
Basic AVR device model.
Definition sim_device.h:61
State
Definition sim_device.h:70
const DeviceConfiguration & config() const
Definition sim_device.h:209
ResetFlag
Definition sim_device.h:86
Logger & logger()
Definition sim_device.h:249
unsigned long frequency() const
Definition sim_device.h:234
virtual ~Device()=default
Option
Definition sim_device.h:101
SleepMode sleep_mode() const
Definition sim_device.h:229
Core & core() const
Definition sim_device.h:224
State state() const
Definition sim_device.h:214
Device(const Device &)=delete
Device & operator=(const Device &)=delete
cycle_count_t cycle() const
Definition sim_device.h:219
CycleManager * cycle_manager()
Definition sim_device.h:254
PinManager & pin_manager()
Definition sim_device.h:259
LogHandler & log_handler()
Definition sim_device.h:244
Definition sim_firmware.h:53
Definition sim_ioreg.h:69
BitMode
Definition sim_ioreg.h:120
Definition sim_logger.h:56
Definition sim_logger.h:91
Abstract class defining a framework for MCU peripherals.
Definition sim_peripheral.h:286
MCU pin model.
Definition sim_pin.h:49
MCU pin manager.
Definition sim_pin.h:220
Representation of a I/O register address, with validity state.
Definition sim_types.h:60
Representation of a ID internally represented as a 64-bits integer but can be initialised with a stri...
Definition sim_types.h:627
int ctlreq_id_t
Definition sim_peripheral.h:111
#define YASIMAVR_BEGIN_NAMESPACE
Definition sim_globals.h:58
#define AVR_CORE_PUBLIC_API
Definition sim_globals.h:46
#define YASIMAVR_END_NAMESPACE
Definition sim_globals.h:59
YASIMAVR_BEGIN_NAMESPACE typedef sim_id_t pin_id_t
Definition sim_pin.h:34
SleepMode
Definition sim_sleep.h:49
unsigned long flash_addr_t
Definition sim_types.h:42
const cycle_count_t INVALID_CYCLE
Definition sim_types.h:46
YASIMAVR_BEGIN_NAMESPACE typedef long long cycle_count_t
Definition sim_types.h:40
Definition sim_config.h:66
Bit mask structure for bitwise operations on 8-bits registers.
Definition sim_types.h:86
Definition sim_peripheral.h:237