sim_twi.h

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/*
 * sim_twi.h
 *
 *  Copyright 2021-2026 Clement Savergne <csavergne@yahoo.com>
 
    This file is part of yasim-avr.
 
    yasim-avr is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
 
    yasim-avr is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with yasim-avr.  If not, see <http://www.gnu.org/licenses/>.
 */
 
//=======================================================================================
 
#ifndef __YASIMAVR_TWI_H__
#define __YASIMAVR_TWI_H__
 
#include "../core/sim_signal.h"
#include "../core/sim_cycle_timer.h"
 
YASIMAVR_BEGIN_NAMESPACE
 
 
//=======================================================================================
#define AVR_CTLREQ_TWI_BUS_ERROR     (AVR_CTLREQ_BASE + 1)
 
 
 
//=======================================================================================
 
namespace TWI {
 
enum Line {
    Line_Clock = 0,
    Line_Data
};
 
enum BusState {
    Bus_Idle = 0,
    Bus_Busy,
    Bus_Owned
};
 
enum SignalId {
    Signal_StateChanged = 0,
 
    Signal_BusStateChanged,
 
    Signal_Start,
 
    Signal_AddressStandby,
 
    Signal_AddressSent,
 
    Signal_AddressReceived,
 
    Signal_DataStandby,
 
    Signal_DataSent,
 
    Signal_DataAckReceived,
 
    Signal_DataReceived,
 
    Signal_DataAckSent,
 
    Signal_ArbitrationLost,
 
    Signal_BusCollision,
 
    Signal_Stop,
};
 
 
class AVR_CORE_PUBLIC_API EndPoint {
 
public:
 
    EndPoint();
    virtual ~EndPoint() = default;
 
    void line_state_changed(TWI::Line line, bool dig_state);
 
    bool get_clock_drive() const;
    bool get_data_drive() const;
 
protected:
 
    virtual void clock_level_changed(bool level) = 0;
    virtual void data_level_changed(bool level) = 0;
    virtual void set_line_state(TWI::Line line, bool dig_state) = 0;
 
    void set_clock_drive(bool level);
    bool get_clock_level() const;
    void set_data_drive(bool level);
    bool get_data_level() const;
 
private:
 
    bool m_clock_drive;
    bool m_clock_level;
    bool m_data_drive;
    bool m_data_level;
 
};
 
 
inline bool EndPoint::get_clock_drive() const
{
    return m_clock_drive;
}
 
inline bool EndPoint::get_clock_level() const
{
    return m_clock_level;
}
 
inline bool EndPoint::get_data_drive() const
{
    return m_data_drive;
}
 
inline bool EndPoint::get_data_level() const
{
    return m_data_level;
}
 
 
//=======================================================================================
 
class AVR_CORE_PUBLIC_API Client : public EndPoint, public CycleTimer {
 
public:
 
    enum State {
        State_Disabled = 0,
        State_Idle,
        State_Start,
        State_AddressRx,
        State_AddressRAck,
        State_AddressWAck,
        State_DataTx,
        State_DataTxAck,
        State_DataRx,
        State_DataRxAck,
 
        State_Count,
    };
 
    Client();
 
    void init(CycleManager& cycle_manager);
 
    State state() const;
 
    void set_enabled(bool enabled);
    bool enabled() const;
 
    void reset();
 
    bool active() const;
    bool clock_hold() const;
    unsigned char rw() const;
    bool ack() const;
 
    bool set_ack(bool ack);
    bool start_data_tx(uint8_t data);
    bool start_data_rx();
 
    Signal& signal();
 
    virtual cycle_count_t next(cycle_count_t when) override;
 
protected:
 
    virtual void clock_level_changed(bool level) override;
    virtual void data_level_changed(bool level) override;
 
private:
 
    State m_state;
    uint8_t m_shifter;
    bool m_ack;
    int m_bitcount;
    bool m_hold;
    CycleManager* m_cycle_manager;
    int m_deferred_drive;
    Signal m_signal;
 
    void set_state(State state);
    void defer_clock_release();
    void defer_data_drive(bool level);
 
};
 
inline Client::State Client::state() const
{
    return m_state;
}
 
inline bool Client::enabled() const
{
    return m_state != State_Disabled;
}
 
inline bool Client::ack() const
{
    return m_ack;
}
 
inline Signal& Client::signal()
{
    return m_signal;
}
 
 
//=======================================================================================
 
class AVR_CORE_PUBLIC_API Host : public EndPoint, public CycleTimer {
 
public:
 
    enum State {
        State_Disabled = 0,
        State_Idle,
        State_Start,
        State_AddressTx,
        State_AddressAck,
        State_DataTx,
        State_DataTxAck,
        State_DataRx,
        State_DataRxAck,
        State_Stop,
        State_BusBusy,
        State_ArbLost,
 
        State_Count
    };
 
    Host();
 
    void init(CycleManager& manager);
 
    State state() const;
 
    void set_enabled(bool enabled);
    bool enabled() const;
 
    void reset();
 
    void set_bit_delay(cycle_count_t delay);
 
    bool bus_busy() const;
    bool active() const;
    bool clock_hold() const;
    bool clock_stretched() const;
    unsigned char rw() const;
    bool ack() const;
 
    bool start_transfer();
    bool set_address(uint8_t addr_rw);
    bool start_data_tx(uint8_t data);
    bool start_data_rx();
    bool set_ack(bool ack);
    bool stop_transfer();
 
    Signal& signal();
 
    virtual cycle_count_t next(cycle_count_t when) override;
 
protected:
 
    virtual void clock_level_changed(bool level) override;
    virtual void data_level_changed(bool level) override;
 
private:
 
    State m_state;
    uint16_t m_flags;
    uint8_t m_shifter;
    int m_step;
    int m_bitcount;
    uint8_t m_addr_rw;
    bool m_ack;
    cycle_count_t m_step_delay;
    uint8_t m_pattern;
    CycleManager* m_cycle_manager;
    bool m_hold;
    Signal m_signal;
 
    void set_state(State state);
    void apply_pattern();
    void process_state_and_reschedule();
    bool process_state(bool inc_step);
    void transition_state();
 
};
 
inline bool Host::enabled() const
{
    return m_state != State_Disabled;
}
 
inline Host::State Host::state() const
{
    return m_state;
}
 
inline bool Host::ack() const
{
    return m_ack;
}
 
inline unsigned char Host::rw() const
{
    return m_addr_rw & 0x01;
}
 
inline bool Host::clock_hold() const
{
    return m_hold;
}
 
inline Signal& Host::signal()
{
    return m_signal;
}
 
}; //namespace TWI
 
 
YASIMAVR_END_NAMESPACE
 
#endif //__YASIMAVR_TWI_H__